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data bulletin mx019 1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 910 744 5050 fax: 910 744 5054 doc. # 20480077.006 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies quad digital control amplifier features applications 4 digitally controlled amplifiers 15 gain/attenuation steps 3 amplifiers 3db range in 0.43db steps 1 'volume' amplifier 14db range in 2db steps 8-bit serial data control output mute function gain control applications audio data telecommunications, radio, & industrial applications 2 3 3 3 4 4 serial data input load/latch load/latch chip address 1 1 2 2 ch1 ch2 ch4 ch3 v dd v bias serial clock input v ss 8-bit serial data input controlled audio output lines volume the mx019 digitally adjustable amplifier array replaces trimmer potentiometers and volume controls in cellular, lmr, telephony and communication applications where voice or data signals need adjustment. the mx019 is a single-chip lsi consisting of four digitally controlled amplifier stages, each with 15 distinct gain/attenuation steps. control of each individual amplifier is by an 8-bit serial data stream. three of the amplifier stages offer a 3db range in steps of 0.43db, while the remaining amplifier offers a 14db range in steps of 2db, and is suggested for volume control applications. each amplifier includes a 16th 'off' state which, when applied, mutes the output audio from that channel. this array uses a chip select input to select one of two mx019s in a system. the mx019 uses the host microprocessor to digitally control the set-up of all audio levels during development, production/calibration, and operation. such applications include: 1. control, adjustment, and set-up of communications equipment by an intelligent ate without manual intervention C eg. deviation, microphone and l/s levels, rx audio level etc. 2. automatic dynamic compensation of drift caused by variations in temperature, linearity, etc. 3. fully automated servicing and re-alignment. the mx019 is a low-power, single 5-volt cmos device available in 24-pin tssop (mx019tn), 16-pin soic (MX019DW), 16-pin cdip (mx019j) and 16-pin pdip (mx019p) package versions.
quad digital control amplifier 2 mx019 1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 910 744 5050 fax: 910 744 5054 doc. # 20480077.006 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies contents section page 1. block diagram 3 2. signal list 4 3. external components 5 4. general description 5 4.1 control data and timing 5 4.1.1 data loading 5 4.1.2 timing 7 5. application 8 6. performance specification 8 6.1 electrical performance 8 6.1.1 absolute maximum ratings 8 6.1.2 operating limits 8 6.1.3 operating characteristics 9 6.2 packaging 10 mx-com, inc. reserves the right to change specifications at any time and without notice.
quad digital control amplifier 3 mx019 1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 910 744 5050 fax: 910 744 5054 doc. # 20480077.006 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies 1. block diagram 2 3 3 3 4 4 serial data input load/latch load/latch chip address 1 1 2 2 ch1 ch2 ch4 ch3 v dd v bias serial clock input v ss 8-bit serial data input controlled audio output lines volume figure 1: device block diagram
quad digital control amplifier 4 mx019 1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 910 744 5050 fax: 910 744 5054 doc. # 20480077.006 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies 2. signal list pin no. j/p dw tn name description 1 1 serial clock this external clock pulse input is used to clock in the control data. see figure 3. this input has an internal 1m pullup resistor. 22 load/ latch this input governs the loading and execution of the control data. during serial data loading this input should be kept at a logical '0' to ensure that data rippling past the latches has no effect. when all 8 bits have been loaded, this input should be strobed '0 - 1 - 0' to latch the new data in. data is executed on the falling edge of the strobe. if the load /latch input is used this pin should be left open circuit. this input has an internal 1m pullup resistor. 34 latch / load this inverted load/ latch input governs the loading and execution of control data. during serial data loading this input should be kept at a logical '1' to ensure that data rippling past the latches has no effect. when all 8 bits have been loaded, this input should be strobed '1' - '0' - '1' to latch the new data in. data is executed on the rising edge of the strobe. if the load/ latch input is used this pin should be left open circuit. this input has an internal 1m pulldown resistor. 4 5 ch1 input analog inputs : 5 6 ch2 input these individual amplifier inputs are self-biasing; ac input analog signals must be capacitively coupled to these pins, as shown in figure 2. 6 7 ch3 input note that amplifiers ch1 to ch4 are 'inverting amplifiers.' 7 8 ch4 input 812 v ss negative supply rail (gnd). 913 v bias the output of the on-chip bias circuitry, held at v dd /2. this pin should be decoupled to v ss as shown in figure 2. 10 14 ch4 output controlled analog outputs : 11 17 ch3 output these are individual "gain controlled" amplifier outputs. ch1 to ch3 range from -3db to +3db in 0.43db steps, ch4 can be utilized as a volume control, 12 18 ch2 output ranging from -14db to +14db in 2.0db steps. in the off mode there is no 13 19 ch1 output output from the selected amplifier. 14 20 chip address a logic input to select one of two mx019 ics in a system (see table 1). this input has an internal 1m pulldown resistor. 15 23 control data input operation of the 4 amplifier channels (ch1 C ch4) is controlled by the 8 bits of data entered serially at this pin. the data is entered (bit 7 to bit 0) on the rising edge of the external serial clock. the data format is described in table 1, table 2 and figure 3. this input has an internal 1m pullup resistor. 16 24 v dd positive supply rail. a single +5v power supply is required.
quad digital control amplifier 5 mx019 1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 910 744 5050 fax: 910 744 5054 doc. # 20480077.006 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies 3. external components v dd v dd c 6 c 1 c 2 c 3 c 4 c 5 v ss v bias 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 serial clock input control data input chip address channel 1 output channel 2 output channel 3 output channel 4 output channel 1 input channel 2 input channel 3 input channel 4 input load/latch load/latch mx019j c1 to c4 0.1f 20% c5 1.0f 20% c6 1.0f 20% figure 2: recommended external components notes: 1. channel amplifiers 1 to 4 are inverting amplifiers. 2. analog input capacitors c1 to c4 are only required for ac input signals, dc input signals do not require these components. 4. general description 4.1 control data and timing the gain of each amplifier block (channel 1 to channel 4) in the mx019 is set by a separate 8-bit data word (bit 7 to bit 0). this 8-bit word, consisting of 4 address bits (bit 7 to bit 4) and 4 gain control bits (bit 3 to bit 0), is loaded to the control data input in serial format using the external data clock. 4.1.1 data loading the 8-bit data word is loaded bit 7 first and bit 0 last. bit 7 must be a logic 1 to address the chip. if bit 7 in the word is a logic 0 that 8-bit word will not be executed. the chip address input permits the use of two devices in a system by indicating to the chip what its address is, a 1 or a 0. bit 6 in the address section of the control word is then used to select which device is being controlled. figure 3 shows the timing information required to load and operate this device. data is loaded to the mx019 on the rising edge of the serial clock. loaded data is executed on the falling (rising) edge of the load/ latch ( load /latch) pulse. table 1 shows the format of each 4-bit address word, table 2 shows the format of each gain control word with figure 3 describing the data loading operation and timing.
quad digital control amplifier 6 mx019 1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 910 744 5050 fax: 910 744 5054 doc. # 20480077.006 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies bit 7 msb bit 6 bit 5 bit 4 lsb channel address chip address chip number 1 1 1 1 0 0 0 0 0 0 1 1 0 1 0 1 1 2 3 4 0 0 0 0 chip 1 1 1 1 1 1 1 1 1 0 0 1 1 0 1 0 1 1 2 3 4 1 1 1 1 chip 2 table 1: address bits format bit 3 msb bit2 bit 1 bit 0 lsb stage 1, 2, 3 (0.43db) stage 4 (2.0db) 0000 off off 0001 -3.0 -14.0db 0010 -2.571 -12.0 0011 -2.143 -10.0 0100 -1.714 -8.0 0101 -1.286 -6.0 0110 -0.857 -4.0 0111 -0.428 -2.0 1000 0 0 1001 0.428 2.0 1010 0.857 4.0 1011 1.286 6.0 1100 1.714 8.0 1101 2.143 10.0 1110 2.571 12.0 1111 3.0 14.0 table 2: gain control bits format
quad digital control amplifier 7 mx019 1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 910 744 5050 fax: 910 744 5054 doc. # 20480077.006 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies 4.1.2 timing timing (figure 3) min. typ. max. units serial clock "high" pulse width (t pwh ) 250 ns serial clock "low" pulse width (t pwl ) 250 ns data set-up time (t ds ) 150 ns data hold time (t dh ) 50.0 ns load/latch pulse width (t llw ) 150 ns load/latch delay (t lld ) 200 ns load/latch over (t llo )0.0ns serial data clock frequency 2.0 mhz serial data clock t pwl t pwh t ds loaded last logic '1' loaded first bit 7 bit 6 bit 1 bit 0 t dh serial data in (one 8-bit word) t llo 8th clock pulse next clock pulse t lld t llw load/latch load/latch figure 3: serial control data loading diagram
quad digital control amplifier 8 mx019 1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 910 744 5050 fax: 910 744 5054 doc. # 20480077.006 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies 5. application to avoid excess noise and instability you should take note of the following: 1. a noisy or badly regulated power supply can cause instability and/or variance of selected gains. 2. care should be taken on the design and layout of the printed circuit board. 3. all external components (figure 2) should be kept close to the mx019 package. 4. inputs and outputs should be shielded wherever possible. 5. tracks should be kept short. 6. analog tracks should not run parallel to digital tracks. 7. a "ground plane" connected to v ss will assist in eliminating external pick-up on the channel input and output pins. 8. do not run high-level output tracks close to low-level input tracks. 6. performance specification 6.1 electrical performance 6.1.1 absolute maximum ratings exceeding these maximum ratings can result in damage to the device. general min. max. units supply voltage -0.3 7.0 v input voltage at any pin (ref v ss = 0v) -0.3 (v dd + 0.3) v current v dd 30 ma v ss 30 ma any other pins 20 ma j/p/dw packages total device dissipation @ t amb 25c 800 mw derating above 25c 10 mw/c above 25c tn packages total device dissipation @ t amb 25c 500 mw derating above 25c 9 mw/c above 25c operating temperature -40 85 c storage temperature -55 125 c 6.1.2 operating limits correct operation of the device outside these limits is not implied. min. typ. max. units v dd 4.5 5.0 5.5 v operating temperature -40 85 c
quad digital control amplifier 9 mx019 1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 910 744 5050 fax: 910 744 5054 doc. # 20480077.006 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies 6.1.3 operating characteristics for the following conditions unless otherwise specified: v dd = 5.0v, t amb = 25c audio level 0db ref. = 775mv rms , amplifier gain set = 0db notes min. typ. max units static values supply current 1.5 ma dynamic values control functions input logic '1' 3.5 v input logic '0' 1.5 v digital input impedances 0.5 1.0 m amplifier stages (general) bandwidth (-3db) 20.0 khz output impedance 1.0 k total harmonic distortion 1 0.35 0.5 % output noise level (per stage) 2 180.0 400.0 v rms onset of clipping 3 1.73 v rms gain variation 4 0.1 db interstage isolation 60.0 db trimmer stages (ch1 C ch3) gain -3.0 +3.0 db gain per step (15 in no.) 0.43 db step error 0.2 db input impedance 100.0 k volume stage (ch4) gain -14.0 +14.0 db gain per step (15 in no.) 2.0 db step error 0.4 db input impedance 50.0 k operating characteristics notes: 1. gain set 0db, input level 1khz -3.0db (549mvrms). 2. with an a.c short-circuit input, measured in a 30khz bandwidth. 3. see figure 4. 4. over the temperature and supply voltage range.
quad digital control amplifier 10 mx019 1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 910 744 5050 fax: 910 744 5054 doc. # 20480077.006 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies input level db sinad (db) 30 40 50 60 -40 -30 -20 -10 0 10.0 25.0 75.0 250.0 775.0 1000.0 1730.0 -17 110.0 mvrms 7.0 input frequency = 1.0khz figure 4: sinad vs input level C typical values 6.2 packaging pin 1 a b alternative pin location marking e l t p j y c h 0.303 (7.70) package tolerances typ. max. min. a b c e h dim. j p y t l 0.047 (1.20) ---------- 0.256 (6.50) 0 8 0.030 (0.75) 0.311 (7.90) 0.177 (4.50) 0.0256 (0.65) 0.020 (0.50) 0.248 (6.30) 0.006 (0.15) 0.002 (0.05) 0.003 (0.08) 0.008 (0.20) 0.007 (0.17) 0.012 (0.30) 0.169 (4.30) note : all dimensions in inches (mm.) angles are in degrees figure 5: 24-pin tssop mechanical outline: order as part no. mx019tn
quad digital control amplifier 11 mx019 1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 910 744 5050 fax: 910 744 5054 doc. # 20480077.006 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies pin 1 a b alternative pin location marking x p j y c k h e l t w z note : all dimensions in inches (mm.) angles are in degrees package tolerances a b c e h typ. max. min. dim. j p x w t y k l 0.105 (2.67) 0.093 (2.36) 0.419 (10.64) 45 7 0 10 0.050 (1.27) 0.041 (1.04) 0.413 (10.49) 0.299 (7.59) 0.050 (1.27) 0.016 (0.41) 0.390 (9.90) 0.020 (0.51) 0.003 (0.08) 0.009 (0.23) 0.0125 (0.32) 0.013 (0.33) 0.020 (0.51) 0.395 (10.03) 0.286 (7.26) z 5 5 figure 6: 16-pin soic mechanical outline: order as part no. MX019DW package tolerances note : all dimensions in inches (mm.) angles are in degrees typ. max. min. a b c e e1 h dim. j j1 p y t k l 0.200 (5.06) 0.262 (6.63) 0.390 (9.91). 7 0.150 (3.81) 0.810 (20.57) 0.135 (3.43) 0.100 (2.54) 0.121 (3.07) 0.300 (7.62) 0.290 (7.37) 0.325 (8.26) 0.015 (0.38) 0.070 (1.77) 0.008 (0.20) 0.015 (0.38) 0.014 (0.35) 0.023 (0.58) 0.040 (1.02) 0.065 (1.65) 0.056 (1.42) 0.064 (1.63) 0.740 (18.80) 0.240 (6.10) b a pin 1 e y e1 t k h j1 j c p l figure 7: 16-pin pdip mechanical outline: order as part no. mx019p
quad digital control amplifier 12 mx019 1998 mx-com, inc. www. mxcom.com tel: 800 638 5577 910 744 5050 fax: 910 744 5054 doc. # 20480077.006 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies b a pin 1 e1 t e k h f j1 j p l c k1 package tolerances note : all dimensions in inches (mm.) angles are in degrees typ. max. min. a b c e e1 f h dim. j j1 p t k1 k l 0.230 (5.84) 0.291 (7.39) 0.415 (10.53) 0.200 (5.08) 0.767 (19.48) 0.165 (4.19) 0.100 (2.54) 0.115 (2.92) 0.370 (9.40) 0.300 (7.61) 0.317 (8.04) 0.70 (17.78) 0.018 (0.46) 0.053 (1.33) 0.075 (1.91) 0.080 (2.03) 0.080 (2.03) 0.753 (19.13) 0.285 (7.24) 0.0102 (0.259) 0.020 (0.51) 0.055 (1.39) 0.0098 (0.249) figure 8: 16-pin cdip mechanical outline: order as part no. mx019j

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